In a conventional programmable logic device (PLD) such as a complex programmable logic device (CPLD), a user implements a desired logical function by configuring logic blocks to perform the desired logical function. If a user desires other features such as memory, additional components besides logic blocks are integrated into the PLD to perform the desired feature. For example, a CPLD may have a number of logic blocks and one or more memory blocks. The ratio of the memory blocks to logic blocks is thus fixed by a given CPLD design. However, it is difficult to predict the desired ratio for any given user. One user may wish to have more memory whereas another user may wish for more logic.
In the digital communication applications, a user often has the need for fully-populated cross point switches in addition to configurable logic capability. To configure a programmable AND array to function as a cross point switch requires the use of many product terms. For example, a 32×32 bit cross point switch is equivalent to thirty-two 32:1 multiplexers. Implementing one of these multiplexers with product terms requires a total of 32 product terms (and thus 32 product term circuits). Thus, implementing a 32×32 bit cross point switch using a programmable AND array requires 1024 product term circuits, which is a substantial demand on logic resources. These 1024 product term circuits would be unavailable to perform a desired logic function when implementing the cross point switch. Just as with memory, it is difficult to predict the ratio of logic/switch capability desired by any given user.
Accordingly, there is a need in the art for a PLD having logic blocks that are configurable to function as logic or as a cross point switch without requiring an excessive amount of product terms.